Online Documentation - Statistics - FAQ - Plugin Parts (All, Dependencies) - Class hierarchy
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The list of the topics, classes, interfaces, controls, modules, global methods by category, global methods by name, screenshots, licenses and examples.
Platforms to show: All Mac Windows Linux Cross-Platform
Constant | Value | Description |
---|---|---|
kFeature100MHzSteps | 80 |
100 MHz multiplier control |
kFeature3DNOW | 56 |
AMD 3DNow! instructions supported |
kFeature3DNOWEXT | 57 |
AMD 3DNow! extended instructions supported |
kFeature3DNOWPrefetch | 68 |
PREFETCH/PREFETCHW support |
kFeatureABM | 65 |
LZCNT instruction support |
kFeatureACPI | 20 |
ACPI support (power states) |
kFeatureAES | 51 |
AES* instructions supported |
kFeatureAPERFMPERF | 91 |
MPERF/APERF MSRs support |
kFeatureAPIC | 9 |
APIC support |
kFeatureAVX | 54 |
Advanced vector extensions supported |
kFeatureCID | 40 |
Context ID supported |
kFeatureCLFLUSH | 18 |
CLFLUSH instruction supported |
kFeatureCMOV | 14 |
CMOVxx instructions supported |
kFeatureCMP_LEGACY | 63 |
core multi-processing legacy mode |
kFeatureConstantTSC | 82 |
TSC ticks at constant rate |
kFeatureCPB | 90 |
Core performance boost |
kFeatureCX16 | 41 |
CMPXCHG16B instruction supported |
kFeatureCX8 | 8 |
CMPXCHG8B instruction supported |
kFeatureDCA | 44 |
Direct cache access supported |
kFeatureDE | 2 |
Debugging extension |
kFeatureDS_CPL | 34 |
CPL Qualified Debug Store |
kFeatureDTS | 19 |
Debug store supported |
kFeatureDTS64 | 32 |
64-bit Debug store supported |
kFeatureEST | 37 |
Enhanced SpeedStep |
kFeatureF16C | 87 |
16-bit FP convert instruction support |
kFeatureFID | 75 |
Frequency ID control |
kFeatureFMA3 | 84 |
The FMA3 instruction set |
kFeatureFMA4 | 85 |
The FMA4 instruction set |
kFeatureFPU | 0 |
Floating point unit |
kFeatureFXSR | 22 |
FXSAVE / FXRSTOR supported |
kFeatureFXSR_OPT | 59 |
FFXSR: FXSAVE and FXRSTOR optimizations |
kFeatureHT | 26 |
Hyper-threading supported (but might be disabled) |
kFeatureHWPState | 81 |
Hardware P-state control |
kFeatureIA64 | 28 |
IA64 supported (Itanium only) |
kFeatureIBS | 70 |
Instruction-based sampling |
kFeatureLAHF_LM | 62 |
LAHF/SAHF supported in 64-bit mode |
kFeatureLM | 61 |
Long mode (x86_64/EM64T) supported Example |
kFeatureMCA | 13 |
Machine check architecture |
kFeatureMCE | 7 |
Machine check exception |
kFeatureMisalignSSE | 66 |
Misaligned SSE supported |
kFeatureMMX | 21 |
MMX instruction set supported |
kFeatureMMXEXT | 55 |
AMD MMX-extended instructions supported |
kFeatureMONITOR | 33 |
MONITOR / MWAIT supported |
kFeatureMOVBE | 49 |
MOVBE instruction supported |
kFeatureMSR | 5 |
Model-specific regsisters, RDMSR/WRMSR supported |
kFeatureMTRR | 10 |
Memory type range registers |
kFeatureNX | 58 |
No-execute bit supported |
kFeatureOSVW | 69 |
OS Visible Workaround (AMD) |
kFeatureOSXSAVE | 53 |
non-privileged copy of OSXSAVE supported |
kFeaturePA | 93 |
Processor accumulator |
kFeaturePAE | 6 |
Physical address extension |
kFeaturePAT | 15 |
Page attribute table |
kFeaturePBE | 29 |
Pending-break enable |
kFeaturePCLMUL | 31 |
PCLMULQDQ instruction supported |
kFeaturePDCM | 43 |
Performance capabilities MSR supported |
kFeaturePFI | 92 |
Processor Feedback Interface support |
kFeaturePGE | 12 |
Page global enable |
kFeaturePN | 17 |
Processor serial # implemented (Intel P3 only) |
kFeaturePNI | 30 |
PNI (SSE3) instructions supported |
kFeaturePOPCNT | 50 |
POPCNT instruction supported |
kFeaturePSE | 3 |
Page size extension |
kFeaturePSE36 | 16 |
36-bit page address extension |
kFeatureRDRAND | 88 |
RdRand instruction |
kFeatureRDTSCP | 60 |
RDTSCP instruction supported (AMD-only) |
kFeatureSEP | 11 |
SYSENTER / SYSEXIT instructions supported |
kFeatureSKINIT | 72 |
SKINIT / STGI supported |
kFeatureSMX | 36 |
Safer mode exceptions |
kFeatureSS | 25 |
Self-snoop |
kFeatureSSE | 23 |
Streaming-SIMD Extensions (SSE) supported |
kFeatureSSE2 | 24 |
SSE2 instructions supported |
kFeatureSSE4A | 67 |
SSE 4a from AMD |
kFeatureSSE4_1 | 45 |
SSE 4.1 instructions supported |
kFeatureSSE4_2 | 46 |
SSE 4.2 instructions supported |
kFeatureSSE5 | 71 |
SSE 5 instructions supported (deprecated, will never be 1) |
kFeatureSSSE3 | 39 |
SSSE3 instructionss supported (this is different from SSE3!) |
kFeatureSTC | 79 |
Software thermal control |
kFeatureSVM | 64 |
AMD Secure virtual machine |
kFeatureSYSCALL | 47 |
SYSCALL / SYSRET instructions supported |
kFeatureTBM | 86 |
Trailing bit manipulation instruction support |
kFeatureTM | 27 |
Thermal monitor |
kFeatureTM2 | 38 |
Thermal monitor 2 |
kFeatureTM_AMD | 78 |
AMD-specified hardware thermal control |
kFeatureTS | 74 |
Temperature sensor |
kFeatureTSC | 4 |
Time-stamp counter |
kFeatureTTP | 77 |
THERMTRIP |
kFeatureVID | 76 |
Voltage ID control |
kFeatureVME | 1 |
Virtual mode extension |
kFeatureVMX | 35 |
Virtualization technology supported |
kFeatureWDT | 73 |
Watchdog timer support |
kFeatureX2APIC | 89 |
x2APIC, APIC_BASE.EXTD, MSRs 0000_0800h...0000_0BFFh 64-bit ICR (+030h but not +031h), no DFR (+00Eh), SELF_IPI (+040h) also see standard level 0000_000Bh. |
kFeatureXD | 48 |
Execute disable bit supported |
kFeatureXOP | 83 |
The XOP instruction set (same as the old CPU_FEATURE_SSE5) |
kFeatureXSAVE | 52 |
XSAVE/XRSTOR/etc instructions supported |
kFeatureXTPR | 42 |
Send Task Priority Messages disable |
Constant | Value | Description |
---|---|---|
kVendorAMD | 1 |
AMD CPU |
kVendorCentaur | 6 |
x86 CPU by IDT |
kVendorCyrix | 2 |
Cyrix CPU |
kVendorIntel | 0 |
Intel CPU |
kVendorNexGen | 3 |
NexGen CPU |
kVendorNSC | 9 |
x86 CPU by National Semiconductor |
kVendorRISE | 7 |
x86 CPU by Rise Technology |
kVendorSiS | 8 |
x86 CPU by SiS |
kVendorTransmeta | 4 |
Transmeta CPU |
kVendorUMC | 5 |
x86 CPU by UMC |
kVendorUnknown | -1 |
Unknown |